1. Field of the Invention
Example embodiments of the present invention relate to a semiconductor device and a method of manufacturing the semiconductor device. More particularly, example embodiments of the present invention relate to a semiconductor device having a substrate and a semiconductor package mounted on the substrate, and a method of manufacturing the semiconductor device.
2. Description of the Related Art
Generally, a semiconductor device is manufactured by various processes, such as a chip fabricating (FAB) process, an electrically die sorting (EDS) process, a packaging process, a mounting process, etc. In the chip fabricating process, a semiconductor chip including integrated circuits is formed on a silicon substrate. In the EDS process, the semiconductor chip is electrically tested and is sorted. In the packaging process, the semiconductor chip is protected by being packaged into a semiconductor package. In the mounting process, the semiconductor package is mounted on a circuit board.
The semiconductor package includes the semiconductor chip, a molding member and a lead. The molding member protects the semiconductor chip. In addition, the lead protruded from the molding member can be used to transmit an electric signal to the semiconductor chip.
The lead is electrically connected to a conductive pattern (hereinafter, referred to as “land”) formed on the circuit board by the mounting process. Particularly, after a solder is formed on the land, the lead is mounted on the land. The solder is heated to a temperature no less than about 200° C. to melt the solder. The molten solder is then cooled. The lead is soldered to the land using the solidified solder. However, a material included in the solder moves to an upper portion of the lead, along the lead, during heating of the solder, so that an interval (hereinafter referred to as “standoff”) between an end portion of the land and an end portion of the lead can become narrower. Accordingly, when the semiconductor device is exposed to a temperature of no less than about 400° C., a stress concentrates at the end portions of the land and the lead. This can be because a shear strain applied to the solder is inversely proportion to the standoff. As a result, a crack can be generated at the solder formed between the end portions of the land and the lead. In addition, when a thermal shock and/or a mechanical shock are applied to the semiconductor device, the crack can spread such that an electrical short and/or a mechanical separation between the land and the lead can be generated.